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» A Methodology for Guided Behavioral-Level Optimization
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SBCCI
2006
ACM
126views VLSI» more  SBCCI 2006»
14 years 1 months ago
Power constrained design optimization of analog circuits based on physical gm/ID characteristics
This paper presents a transistor optimization methodology for low-power analog integrated CMOS circuits, relying on the physics-based gm/ID characteristics as a design optimizatio...
Alessandro Girardi, Sergio Bampi
DAC
2009
ACM
14 years 8 months ago
ILP-based pin-count aware design methodology for microfluidic biochips
Digital microfluidic biochips have emerged as a popular alternative for laboratory experiments. To make the biochip feasible for practical applications, pin-count reduction is a k...
Cliff Chiung-Yu Lin, Yao-Wen Chang
DAC
2000
ACM
14 years 8 months ago
Unifying behavioral synthesis and physical design
eously demand shorter and less costly design cycles. Designing at higher levels of abstraction makes both objectives achievable, but enabling techniques like behavioral synthesis h...
William E. Dougherty, Donald E. Thomas
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
14 years 2 months ago
Incorporating graceful degradation into embedded system design
In this work, the focus is put on the behavior of a system in case a fault occurs that disables the system from executing its applications. Instead of executing a random subset of...
Michael Glaß, Martin Lukasiewycz, Christian ...
GECCO
2008
Springer
155views Optimization» more  GECCO 2008»
13 years 8 months ago
Integrating user preferences with particle swarms for multi-objective optimization
This paper proposes a method to use reference points as preferences to guide a particle swarm algorithm to search towards preferred regions of the Pareto front. A decision maker c...
Upali K. Wickramasinghe, Xiaodong Li