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DATE
2010
IEEE
192views Hardware» more  DATE 2010»
14 years 26 days ago
PhoenixSim: A simulator for physical-layer analysis of chip-scale photonic interconnection networks
—Recent developments have shown the possibility of leveraging silicon nanophotonic technologies for chip-scale interconnection fabrics that deliver high bandwidth and power effi...
Johnnie Chan, Gilbert Hendry, Aleksandr Biberman, ...
SIGUCCS
2003
ACM
14 years 1 months ago
Deep in budget restraints: return on investment (ROI)
The University of Missouri–Columbia’s Information and Access Technology (IAT) Services division’s InfoTech Training department measures IT training using the return on inves...
Terry Robb, Joleen Pfefer
KDD
2009
ACM
227views Data Mining» more  KDD 2009»
14 years 8 months ago
Efficiently learning the accuracy of labeling sources for selective sampling
Many scalable data mining tasks rely on active learning to provide the most useful accurately labeled instances. However, what if there are multiple labeling sources (`oracles...
Pinar Donmez, Jaime G. Carbonell, Jeff Schneider
IOLTS
2005
IEEE
141views Hardware» more  IOLTS 2005»
14 years 1 months ago
A Novel On-Chip Delay Measurement Hardware for Efficient Speed-Binning
With the aggressive scaling of the CMOS technology parametric variation of the transistor threshold voltage causes significant spread in the circuit delay as well as leakage spect...
Arijit Raychowdhury, Swaroop Ghosh, Kaushik Roy
DAGSTUHL
2006
13 years 9 months ago
A Framework for Analyzing Composition of Security Aspects
The methodology of aspect-oriented software engineering has been proposed to factor out concerns that are orthogonal to the core functionality of a system. In particular, this is a...
Jorge Fox, Jan Jürjens