109 search results - page 3 / 22 » A Methodology for Large-Scale Hardware Verification |
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
CCR
2004
13 years 8 months ago
2004
This paper emphasizes the need for methodological frameworks for analysis and design of large scale networks which are independent of specific design innovations and their advocac...
DATE
2006
IEEE
14 years 2 months ago
2006
IEEE
Structured-ASIC design provides a mid-way point between FPGA and cell-based ASIC design for performance, area and power, but suffers from the same increasing verification burden a...
DATE
2004
IEEE
14 years 8 days ago
2004
IEEE
This paper presents an overview of an assembler driven verification methodology (ADVM) that was created and implemented for a chip card project at Infineon Technologies AG [2]. Th...
DATE
2004
IEEE
14 years 8 days ago
2004
IEEE
Formal verification techniques have been playing an important role in pre-silicon validation processes. One of the most important points considered in performing formal verificati...