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» A Methodology for Validation of Microprocessors using Equiva...
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CODES
2008
IEEE
13 years 9 months ago
Specification-based compaction of directed tests for functional validation of pipelined processors
Functional validation is a major bottleneck in microprocessor design methodology. Simulation is the widely used method for functional validation using billions of random and biase...
Heon-Mo Koo, Prabhat Mishra
DAC
2008
ACM
14 years 8 months ago
Construction of concrete verification models from C++
C++ based verification methodologies are now emerging as the preferred method for SOC design. However most of the verification involving the C++ models are simulation based. The c...
Malay Haldar, Gagandeep Singh, Saurabh Prabhakar, ...
POPL
2010
ACM
14 years 5 months ago
Dependent types and program equivalence
The definition of type equivalence is one of the most important design issues for any typed language. In dependentlytyped languages, because terms appear in types, this definition...
Jianzhou Zhao, Limin Jia, Stephanie Weirich, Vilhe...
DATE
2005
IEEE
119views Hardware» more  DATE 2005»
14 years 1 months ago
Functional Validation of System Level Static Scheduling
Increase in system level modeling has given rise to a need for efficient functional validation of models above cycle accurate level. This paper presents a technique for comparing...
Samar Abdi, Daniel D. Gajski
MICRO
2010
IEEE
153views Hardware» more  MICRO 2010»
13 years 5 months ago
AVF Stressmark: Towards an Automated Methodology for Bounding the Worst-Case Vulnerability to Soft Errors
Soft error reliability is increasingly becoming a first-order design concern for microprocessors, as a result of higher transistor counts, shrinking device geometries and lowering ...
Arun A. Nair, Lizy Kurian John, Lieven Eeckhout