113 search results - page 7 / 23 » A Methodology for Validation of Microprocessors using Equiva... |
ICCAD
1999
IEEE
13 years 12 months ago
1999
IEEE
In Deep Sub-Micron (DSM) designs, performance will depend critically on the latency of long wires. We propose a new synthesis methodology for synchronous systems that makes the de...
TCAD
2008
13 years 7 months ago
2008
Abstract--Thermal issues are fast becoming major design constraints in high-performance systems. Temperature variations adversely affect system reliability and prompt worst-case de...
FMCAD
2009
Springer
13 years 11 months ago
2009
Springer
This paper discusses a methodology used on an industrial hardware development project to validate various cache-coherence protocol components. The idea is to use a high level model...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
Functional verification of microprocessors is one of the most complex and expensive tasks in the current system-on-chip design process. A significant bottleneck in the validatio...
SEFM
2006
IEEE
14 years 1 months ago
2006
IEEE
An optimization can be specified as sequential compositions of predefined transformation primitives. For each primitive, we can define soundness conditions which guarantee that th...