146 search results - page 26 / 30 » A Methodology to Implement Real-Time Applications on Reconfi... |
ICCAD
2009
IEEE
13 years 5 months ago
2009
IEEE
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
GLVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
In this paper we present a methodology that is based on SystemC [1] for rapid prototyping to greatly enhance and accelerate the exploration of complex systems to optimize the syst...
ISSS
2002
IEEE
14 years 12 days ago
2002
IEEE
ForSyDe (FORmal SYstem DEsign) is a methodology which addresses the design of SoC applications which may contain control as well as data flow dominated parts. Starting with a for...
CPAIOR
2007
Springer
14 years 1 months ago
2007
Springer
Abstract. In recent work binary decision diagrams (BDDs) were introduced as a technique for postoptimality analysis for integer programming. In this paper we show that much smaller...