1609 search results - page 269 / 322 » A Microeconomic Scheduler for Parallel Computers |
PPOPP
2009
ACM
14 years 9 months ago
2009
ACM
Understanding why the performance of a multithreaded program does not improve linearly with the number of cores in a sharedmemory node populated with one or more multicore process...
ICPP
2009
IEEE
14 years 3 months ago
2009
IEEE
— High-end computing (HEC) systems have passed the petaflop barrier and continue to move toward the next frontier of exascale computing. As companies and research institutes con...
EUROPAR
2009
Springer
14 years 1 months ago
2009
Springer
Multicore architectures featuring specialized accelerators are getting an increasing amount of attention, and this success will probably influence the design of future High Perfor...
HPCA
2008
IEEE
14 years 9 months ago
2008
IEEE
This paper describes a comprehensive approach for using the memory controller to improve DRAM energy efficiency and manage DRAM power. We make three contributions: (1) we describe...
HPCA
2001
IEEE
14 years 9 months ago
2001
IEEE
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high...