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MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
14 years 29 days ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
ICECCS
2010
IEEE
162views Hardware» more  ICECCS 2010»
13 years 6 months ago
Trust-Based Adaptation in Complex Service-Oriented Systems
Abstract—Complex networks consisting of humans and software services, such as Web-based social and collaborative environments, typically require flexible and context-based inter...
Florian Skopik, Daniel Schall, Schahram Dustdar
ISLPED
2005
ACM
93views Hardware» more  ISLPED 2005»
14 years 8 days ago
Power-aware code scheduling for clusters of active disks
In this paper, we take the idea of application-level processing on disks to one level further, and focus on an architecture, called Cluster of Active Disks (CAD), where the storag...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir
ASAP
2005
IEEE
165views Hardware» more  ASAP 2005»
14 years 10 days ago
CONAN - A Design Exploration Framework for Reliable Nano-Electronics
In this paper we introduce a design methodology that allows the system/circuit designer to build reliable systems out of unreliable nano-scale components. The central point of our...
Sorin Cotofana, Alexandre Schmid, Yusuf Leblebici,...
ASPLOS
2008
ACM
13 years 8 months ago
Accelerating two-dimensional page walks for virtualized systems
Nested paging is a hardware solution for alleviating the software memory management overhead imposed by system virtualization. Nested paging complements existing page walk hardwar...
Ravi Bhargava, Ben Serebrin, Francesco Spadini, Sr...