982 search results - page 6 / 197 » A Multiprocessor Communication Architecture For High Speed N... |
SIPS
2008
IEEE
14 years 1 months ago
2008
IEEE
Modern microprocessor technology is migrating from simply increasing clock speeds on a single processor to placing multiple processors on a die to increase throughput and power pe...
TPDS
2002
13 years 7 months ago
2002
Multiprocessor architectures demand efficient interprocessor communication to maximize system utilization and performance. To meet future demands, these interconnects must communic...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper explores generating efficient, portable HighSpeed Producer Consumer (HSPC) code on current shared memory architectures: Chip Multi-Processors (CMP), Simultaneous Multi...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents a new multiprocessor platform for high throughput turbo decoding. The proposed platform is based on a new configurable ASIP combined with an efficient memory a...
GLVLSI
2000
IEEE
13 years 11 months ago
2000
IEEE
A new ADC architecture is devised. This architecture is memory based, in which the last sample is used to predict the current one, resulting in both power dissipation and energy r...