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» A Network Memory Architecture Model and Performance Analysis
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ICC
2007
IEEE
134views Communications» more  ICC 2007»
14 years 3 months ago
Performance Analysis of Polling based TDMA MAC Protocols with Sleep and Wakeup Cycles
— In sensor networks, MAC protocols based on Time Division Multiple Access (TDMA) with wakeup and sleep periods have attracted considerable interest because of their low power co...
Haiming Yang, Biplab Sikdar
DAC
2000
ACM
14 years 10 months ago
Performance analysis and optimization of latency insensitive systems
Latency insensitive design has been recently proposed in literature as a way to design complex digital systems, whose functional behavior is robust with respect to arbitrary varia...
Luca P. Carloni, Alberto L. Sangiovanni-Vincentell...
BTW
2009
Springer
146views Database» more  BTW 2009»
14 years 3 months ago
Towards Flash Disk Use in Databases - Keeping Performance While Saving Energy?
Abstract: Green computing or energy saving when processing information is primarily considered a task of processor development. We, however, advocate that a holistic approach is ne...
Theo Härder, Karsten Schmidt 0002, Yi Ou, Seb...
NOCS
2008
IEEE
14 years 3 months ago
Debugging Distributed-Shared-Memory Communication at Multiple Granularities in Networks on Chip
We present a methodology to debug a SOC by concentrating on its communication. Our extended communication model includes a) multiple signal groups per interface protocol at each I...
Bart Vermeulen, Kees Goossens, Siddharth Umrani
VLSID
2004
IEEE
147views VLSI» more  VLSID 2004»
14 years 9 months ago
High-Performance Power Grids For Nanometer Technologies
With shrinking noise margins and increasing numbers of on-chip noise sources, power grid design has become a critical performance determinant. This paper presents an overview of r...
Sachin S. Sapatnekar