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VLSID
2004
IEEE

High-Performance Power Grids For Nanometer Technologies

15 years 25 days ago
High-Performance Power Grids For Nanometer Technologies
With shrinking noise margins and increasing numbers of on-chip noise sources, power grid design has become a critical performance determinant. This paper presents an overview of recent techniques for the analysis and optimization of supply networks, and discusses future trends in power grid design.
Sachin S. Sapatnekar
Added 01 Dec 2009
Updated 01 Dec 2009
Type Conference
Year 2004
Where VLSID
Authors Sachin S. Sapatnekar
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