3629 search results - page 168 / 726 » A Network Memory Architecture Model and Performance Analysis |
DAC
2010
ACM
13 years 9 months ago
2010
ACM
Packet-switched networks-on-chip (NoC) have been proposed as an efficient communication infrastructure for multi-core architectures. Adding virtual channels to a NoC helps to avoi...
ISCA
2010
IEEE
14 years 2 months ago
2010
IEEE
Power consumption has become a major constraint in the design of processors today. To optimize a processor for energyefficiency requires an examination of energy-performance trade...
IWNAS
2008
IEEE
14 years 3 months ago
2008
IEEE
With the increased popularity of replica-based services in distributed systems such as the Grid, consistency control among replicas becomes more and more important. To this end, I...
CLUSTER
2004
IEEE
13 years 9 months ago
2004
IEEE
In previous papers [5,6], an optical switch architecture was proposed to handle variable-length packets such as IP datagrams, based on an AWG device to route packets and equipped w...
CODES
2005
IEEE
14 years 2 months ago
2005
IEEE
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...