Sciweavers

3629 search results - page 23 / 726
» A Network Memory Architecture Model and Performance Analysis
Sort
View
ISCA
2009
IEEE
239views Hardware» more  ISCA 2009»
14 years 2 months ago
Scalable high performance main memory system using phase-change memory technology
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Ju...
SC
2000
ACM
14 years 1 days ago
Performance of Hybrid Message-Passing and Shared-Memory Parallelism for Discrete Element Modeling
The current trend in HPC hardware is towards clusters of shared-memory (SMP) compute nodes. For applications developers the major question is how best to program these SMP cluster...
D. S. Henty
IWMM
2010
Springer
125views Hardware» more  IWMM 2010»
13 years 9 months ago
Efficient memory shadowing for 64-bit architectures
Shadow memory is used by dynamic program analysis tools to store metadata for tracking properties of application memory. The efficiency of mapping between application memory and s...
Qin Zhao, Derek Bruening, Saman P. Amarasinghe
MICRO
2006
IEEE
145views Hardware» more  MICRO 2006»
14 years 1 months ago
Virtually Pipelined Network Memory
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
Banit Agrawal, Timothy Sherwood