3629 search results - page 32 / 726 » A Network Memory Architecture Model and Performance Analysis |
IPPS
2000
IEEE
14 years 2 days ago
2000
IEEE
One of the keys for the success of parallel processing is the availability of high-level programming languages for on-the-shelf parallel architectures. Using explicit message passi...
ASPDAC
2004
ACM
14 years 1 months ago
2004
ACM
— It is predicted that 70% of the chip area will be occupied by memories in future system-onchips. The minimization of on-chip memory hence becomes increasingly important for cos...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Static worst-case execution time (WCET) analysis is done by modeling the hardware behavior. In this paper we describe a WCET analysis technique to analyze systems with function ca...
NETWORKING
2004
13 years 9 months ago
2004
Firewalls are a well-established security mechanism to restrict the traffic exchanged between networks to a certain subset of users and applications. In order to cope with new appl...
ASPDAC
2011
ACM
12 years 11 months ago
2011
ACM
This paper studies realization and performance comparison of the sequential and weak consistency models in the network-on-chip (NoC) based distributed shared memory (DSM) multi-cor...