The Convex SPP-1000 is the first commercial implementation of a new generation of scalable shared memory parallel computers with full cache coherence. It employs a hierarchical s...
Thomas L. Sterling, Daniel Savarese, Peter MacNeic...
We present a modular and scalable approach for automatically extracting actual performance information from a set of FPGA-based architecture topologies. This information is used d...
Douglas Densmore, Adam Donlin, Alberto L. Sangiova...
This paper describes a method for the "Analysis and Prediction of Performance for Evolving Architectures" (APPEAR). The method aims at performance estimation of adapted ...
Evgeni M. Eskenazi, Alexandre V. Fioukov, Dieter K...
Non-uniform temperature profiles along global interconnect lines in high-performance ICs can significantly impact the performance of these lines. This paper presents a detailed an...
Amir H. Ajami, Kaustav Banerjee, Massoud Pedram, L...
A team of researchers from the Massachusetts Institute of Technology (MIT) and Northwestern University (NU) is developing a system for long-distance, high-fidelity qubit teleporta...
Seth Lloyd, Jeffrey H. Shapiro, Franco N. C. Wong,...