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» A Network Memory Architecture Model and Performance Analysis
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AAAI
2011
12 years 7 months ago
A Functional Analysis of Historical Memory Retrieval Bias in the Word Sense Disambiguation Task
Effective access to knowledge within large declarative memory stores is one challenge in the development and understanding of long-living, generally intelligent agents. We focus o...
Nate Derbinsky, John E. Laird
JCP
2008
190views more  JCP 2008»
13 years 7 months ago
Real-time System Identification of Unmanned Aerial Vehicles: A Multi-Network Approach
In this paper, real-time system identification of an unmanned aerial vehicle (UAV) based on multiple neural networks is presented. The UAV is a multi-input multi-output (MIMO) nonl...
Vishwas R. Puttige, Sreenatha G. Anavatti
ICCAD
2002
IEEE
141views Hardware» more  ICCAD 2002»
14 years 4 months ago
A hierarchical modeling framework for on-chip communication architectures
— The communication sub-system of complex IC systems is increasingly critical for achieving system performance. Given this, it is important that the on-chip communication archite...
Xinping Zhu, Sharad Malik
IISWC
2006
IEEE
14 years 1 months ago
Performance Analysis of Sequence Alignment Applications
— Recent advances in molecular biology have led to a continued growth in the biological information generated by the scientific community. Additionally, this area has become a m...
Friman Sánchez, Esther Salamí, Alex ...
PPOPP
2006
ACM
14 years 1 months ago
High-performance IPv6 forwarding algorithm for multi-core and multithreaded network processor
IP forwarding is one of the main bottlenecks in Internet backbone routers, as it requires performing the longest-prefix match at 10Gbps speed or higher. IPv6 forwarding further ex...
Xianghui Hu, Xinan Tang, Bei Hua