83 search results - page 6 / 17 » A New Combinational Logic Minimization Technique with Applic... |
TSE
2010
13 years 6 months ago
2010
— Web script crashes and malformed dynamically-generated web pages are common errors, and they seriously impact the usability of web applications. Current tools for web-page vali...
TCAD
1998
13 years 7 months ago
1998
—Conventional scan design imposes considerable area and delay overheads. To establish a scan chain in the test mode, multiplexers at the inputs of flip-flops and scan wires are...
FCCM
1999
IEEE
14 years 4 days ago
1999
IEEE
The time it takes to reconfigure FPGAs can be a significant overhead for reconfigurable computing. In this paper we develop new compression algorithms for FPGA configurations that...
DAC
1994
ACM
13 years 12 months ago
1994
ACM
A powerful combinational path sensitization engine is required for the efficient implementation of tools for test pattern generation, timing analysis, and delay fault testing. Path...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
: Asynchronous circuits are often presented as a means of achieving low power operation. We investigate their suitability for low-energy applications, where long battery life and d...