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» A New Method for Design of Robust Digital Circuits
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DAC
2006
ACM
14 years 1 months ago
Modeling and minimization of PMOS NBTI effect for robust nanometer design
Negative bias temperature instability (NBTI) has become the dominant reliability concern for nanoscale PMOS transistors. In this paper, a predictive model is developed for the deg...
Rakesh Vattikonda, Wenping Wang, Yu Cao
DAC
2006
ACM
14 years 8 months ago
A new LP based incremental timing driven placement for high performance designs
In this paper, we propose a new linear programming based timing driven placement framework for high performance designs. Our LP framework is mainly net-based, but it takes advanta...
Tao Luo, David Newmark, David Z. Pan
ISCAS
2007
IEEE
106views Hardware» more  ISCAS 2007»
14 years 2 months ago
Ensemble Dependent Matrix Methodology for Probabilistic-Based Fault-tolerant Nanoscale Circuit Design
—Two probabilistic-based models, namely the Ensemble-Dependent Matrix model [1][3] and the Markov Random Field model [2], have been proposed to deal with faults in nanoscale syst...
Huifei Rao, Jie Chen, Changhong Yu, Woon Tiong Ang...
ICIP
2009
IEEE
13 years 5 months ago
New image processing challenges for jointly designed electro-optical imaging systems
Still-image processing algorithms are tailored to and depend crucially upon the properties of the class of images to which they are applied, for instance natural images in consumer...
M. Dirk Robinson, David G. Stork
ENGL
2007
83views more  ENGL 2007»
13 years 7 months ago
Analysis of Hybrid Translinear Circuit and Its Application
—A hybrid translinear (TL) circuit constituted by two kinds of transistors, bipolar and CMOS transistors, was proposed to control its quiescent current. And a new method was intr...
Cheng Yuhua, Wu Xiaobo, Yan Xiaolang