945 search results - page 40 / 189 » A New Method for Design of Robust Digital Circuits |
ISPD
2009
ACM
14 years 3 months ago
2009
ACM
Gate sizing and threshold voltage (Vt) assignment are popular techniques for circuit timing and power optimization. Existing methods, by and large, are either sensitivity-driven h...
ATAL
2006
Springer
14 years 22 days ago
2006
Springer
This paper introduces a new design method for multi-agent systems (MAS) that incorporate logic programming. The DigitalFriend is an example of a MAS with a built-in logic language...
ICCAD
2006
IEEE
14 years 3 months ago
2006
IEEE
Designing asynchronous circuits by reusing existing synchronous tools has become a promising solution to the problem of poor CAD support in asynchronous world. A straightforward w...
ICCAD
2001
IEEE
14 years 5 months ago
2001
IEEE
: This paper describes ASF, a novel cell-level analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufactu...
ICCAD
2000
IEEE
14 years 18 days ago
2000
IEEE
ct Static timing analysis has traditionally used the PERT method for identifying the critical path of a digital circuit. Due to the influence of the slope of a signal at a particul...