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» A New Method for Design of Robust Digital Circuits
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DAC
2002
ACM
14 years 10 months ago
Transformation based communication and clock domain refinement for system design
The ForSyDe methodology has been developed for system level design. In this paper we present formal transformation methods for the refinement of an abstract and formal system mode...
Ingo Sander, Axel Jantsch
DATE
2007
IEEE
145views Hardware» more  DATE 2007»
14 years 3 months ago
Using an innovative SoC-level FMEA methodology to design in compliance with IEC61508
This paper proposes an innovative methodology to perform and validate a Failure Mode and Effects Analysis (FMEA) at System-on-Chip (SoC) level. This is done in compliance with the...
Riccardo Mariani, Gabriele Boschi, Federico Colucc...
ISLPED
1997
ACM
124views Hardware» more  ISLPED 1997»
14 years 1 months ago
Low power high level synthesis by increasing data correlation
With the increasing performance and density of VLSI circuits as well as the popularity of portable devices such as personal digital assistance, power consumption has emerged as an...
Dongwan Shin, Kiyoung Choi
ASPDAC
2008
ACM
92views Hardware» more  ASPDAC 2008»
13 years 11 months ago
Decomposition based approach for synthesis of multi-level threshold logic circuits
Scaling is currently the most popular technique used to improve performance metrics of CMOS circuits. This cannot go on forever because the properties that are responsible for the ...
Tejaswi Gowda, Sarma B. K. Vrudhula
ICASSP
2009
IEEE
14 years 3 months ago
Sparse imputation for noise robust speech recognition using soft masks
In previous work we introduced a new missing data imputation method for ASR, dubbed sparse imputation. We showed that the method is capable of maintaining good recognition accurac...
Jort F. Gemmeke, Bert Cranen