945 search results - page 67 / 189 » A New Method for Design of Robust Digital Circuits |
FDTC
2006
Springer
14 years 22 days ago
2006
Springer
We present a new approach to fault tolerant public key cryptography based on redundant arithmetic in finite rings. Redundancy is achieved by embedding non-redundant field or ring ...
DAC
2005
ACM
13 years 11 months ago
2005
ACM
In this paper, we propose a new sensitivity based, statistical gate sizing method. Since circuit optimization effects the entire shape of the circuit delay distribution, it is dif...
ICCAD
2009
IEEE
13 years 6 months ago
2009
IEEE
Current logic synthesis techniques are ineffective for arithmetic circuits. They perform poorly for XOR-dominated circuits, and those with a high fan-in dependency between inputs ...
ISMVL
2008
IEEE
14 years 3 months ago
2008
IEEE
Synthesis of reversible logic has become an active research area in the last years. But many proposed algorithms are evaluated with a small set of benchmarks only. Furthermore, re...
ISQED
2005
IEEE
14 years 2 months ago
2005
IEEE
The purpose of the paper is to introduce a new failure rate-based methodology for reliability simulation of deep submicron CMOS integrated circuits. Firstly, two of the state-of-t...