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» A New Method for Design of Robust Digital Circuits
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DAC
2007
ACM
14 years 10 months ago
Optimization of Area in Digital FIR Filters using Gate-Level Metrics
In the paper, we propose a new metric for the minimization of area in the generic problem of multiple constant multiplications, and demonstrate its effectiveness for digital FIR f...
Eduardo A. C. da Costa, José C. Monteiro, L...
ASPDAC
2006
ACM
130views Hardware» more  ASPDAC 2006»
14 years 3 months ago
Convergence-provable statistical timing analysis with level-sensitive latches and feedback loops
Statistical timing analysis has been widely applied to predict the timing yield of VLSI circuits when process variations become significant. Existing statistical latch timing met...
Lizheng Zhang, Jeng-Liang Tsai, Weijen Chen, Yuhen...
ASPDAC
2004
ACM
169views Hardware» more  ASPDAC 2004»
14 years 2 months ago
Design of real-time VGA 3-D image sensor using mixed-signal techniques
— We have developed the first real-time 3-D image sensor with VGA pixel resolution using mixed-signal techniques to achieve high-speed and high-accuracy range calculation based ...
Yusuke Oike, Makoto Ikeda, Kunihiro Asada
FPL
2008
Springer
154views Hardware» more  FPL 2008»
13 years 10 months ago
Numerical function generators using bilinear interpolation
Two-variable numerical functions are widely used in various applications, such as computer graphics and digital signal processing. Fast and compact hardware implementations are re...
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
DAC
2011
ACM
12 years 8 months ago
Efficient incremental analysis of on-chip power grid via sparse approximation
In this paper, a new sparse approximation technique is proposed for incremental power grid analysis. Our proposed method is motivated by the observation that when a power grid net...
Pei Sun, Xin Li, Ming Yuan Ting