522 search results - page 40 / 105 » A Note on Designing Logical Circuits Using SAT |
CSFW
2003
IEEE
14 years 20 days ago
2003
IEEE
SPKI/SDSI is a language for expressing distributed access control policy, derived from SPKI and SDSI. We provide a first-order logic (FOL) semantics for SDSI, and show that it ha...
ISCAS
2008
IEEE
14 years 1 months ago
2008
IEEE
— This article explores the effect of using source follower buffers (SFB) at the output of source coupled logic (SCL) circuits. This technique can help to improve the power-delay...
DAC
2007
ACM
14 years 8 months ago
2007
ACM
Despite the impressive progress of logic synthesis in the past decade, finding the best architecture for a given circuit still remains an open problem and largely unsolved. In mos...
DFT
1998
IEEE
13 years 11 months ago
1998
IEEE
This paper presents a system to evaluate the testability of an on-line testable circuit. The system operates at the RT-level, before the logic synthesis step, and allows for an ex...
ICCAD
1998
IEEE
13 years 11 months ago
1998
IEEE
Domino logic is a popular con guration for implementing high-speed circuits. An algorithm for domino logic mapping, under a parameterized library style, is presented here. Practic...