522 search results - page 53 / 105 » A Note on Designing Logical Circuits Using SAT |
VLSISP
2002
13 years 7 months ago
2002
3:2 counters and 4:2 compressors have been widely used for multiplier implementations. In this paper, a fast 5:3 compressor is derived for high-speed multiplier implementations. Th...
ICCAD
2006
IEEE
14 years 5 months ago
2006
IEEE
— Negative Bias Temperature Instability (NBTI) in PMOS transistors has become a significant reliability concern in present day digital circuit design. With continued scaling, th...
EUROGP
2008
Springer
13 years 10 months ago
2008
Springer
A new class of FPGA-based accelerators is presented for Cartesian Genetic Programming (CGP). The accelerators contain a genetic engine which is reused in all applications. Candidat...
DAC
2004
ACM
14 years 9 months ago
2004
ACM
Parametric representations used for symbolic simulation of circuits usually use BDDs. After a few steps of symbolic simulation, state set representation is converted from one para...
FPGA
2003
ACM
14 years 1 months ago
2003
ACM
As integrated circuits become more and more complex, the ability to make post-fabrication changes will become more and more attractive. This ability can be realized using programm...