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» A Note on Designing Logical Circuits Using SAT
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EVOW
1999
Springer
14 years 10 days ago
Evolution of Digital Filters Using a Gate Array Model
The traditional paradigm for digital filter design is based on the concept of a linear difference equation with the output response being a weighted sum of signal samples with usua...
Julian F. Miller
IOLTS
2008
IEEE
117views Hardware» more  IOLTS 2008»
14 years 2 months ago
Verification and Analysis of Self-Checking Properties through ATPG
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
Marc Hunger, Sybille Hellebrand
VTS
2000
IEEE
95views Hardware» more  VTS 2000»
14 years 13 days ago
Word Voter: A New Voter Design for Triple Modular Redundant Systems
Redundancy techniques are commonly used to design dependable systems to ensure high reliability, availability and data integrity. Triple Modular Redundancy (TMR) is a widely used ...
Subhasish Mitra, Edward J. McCluskey
CHES
2006
Springer
146views Cryptology» more  CHES 2006»
13 years 11 months ago
Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits
This paper presents a Path Swapping (PS) method which enables to enhance the security of Quasi Delay Insensitive Asynchronous Circuits against Power Analysis (PA) attack. This appr...
G. Fraidy Bouesse, Gilles Sicard, Marc Renaudin
VLSID
2009
IEEE
130views VLSI» more  VLSID 2009»
14 years 8 months ago
Reversible Logic Synthesis with Output Permutation
Synthesis of reversible logic has become a very important research area. In recent years several algorithms ? heuristic as well as exact ones ? have been introduced in this area. ...
Daniel Große, Gerhard W. Dueck, Robert Wille...