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» A Novel Metric for Interconnect Architecture Performance
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CN
2004
104views more  CN 2004»
13 years 7 months ago
Reducing power consumption and enhancing performance by direct slave-to-slave and group communication in Bluetooth WPANs
Bluetooth is a promising wireless technology aiming at supporting electronic devices to be instantly interconnected into short-range ad hoc networks. The Bluetooth medium access c...
Carlos de M. Cordeiro, Sachin Abhyankar, Dharma P....
ARC
2007
Springer
169views Hardware» more  ARC 2007»
14 years 2 months ago
Designing Heterogeneous FPGAs with Multiple SBs
Abstract. The novel design of high-speed and low-energy FPGA routing architecture consisting of appropriate wire segments and multiple Switch Boxes is introduced. For that purpose,...
Kostas Siozios, Stelios Mamagkakis, Dimitrios Soud...
IJPP
2006
145views more  IJPP 2006»
13 years 7 months ago
Deterministic Parallel Processing
Abstract. In order to address the problems faced in the wireless communications domain, picoChip has devised the picoArrayTM . The picoArrayTM is a tiled-processor architecture, co...
Gajinder Panesar, Daniel Towner, Andrew Duller, Al...
DAC
2005
ACM
13 years 9 months ago
Piece-wise approximations of RLCK circuit responses using moment matching
Capturing RLCK circuit responses accurately with existing model order reduction (MOR) techniques is very expensive. Direct metrics for fast analysis of RC circuits exist but there...
Chirayu S. Amin, Yehea I. Ismail, Florentin Dartu
CGO
2007
IEEE
14 years 2 months ago
Exploiting Narrow Accelerators with Data-Centric Subgraph Mapping
The demand for high performance has driven acyclic computation accelerators into extensive use in modern embedded and desktop architectures. Accelerators that are ideal from a sof...
Amir Hormati, Nathan Clark, Scott A. Mahlke