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159
Voted
MICRO
2008
IEEE
16 years 5 days ago
2008
IEEE
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
182
Voted
SIGMETRICS
2008
ACM
15 years 5 months ago
2008
ACM
Fine-grained network measurement requires routers and switches to update large arrays of counters at very high link speed (e.g. 40 Gbps). A naive algorithm needs an infeasible amo...
233
Voted
FPGA
2003
ACM
15 years 11 months ago
2003
ACM
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...
203
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BMCBI
2008
15 years 5 months ago
2008
Background: This paper describes techniques for accelerating the performance of the string set matching problem with particular emphasis on applications in computational proteomic...
140
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IPPS
2007
IEEE
16 years 3 days ago
2007
IEEE
Fast hardware turnover in supercomputing centers, stimulated by rapid technological progress, results in high heterogeneity among HPC platforms, and necessitates that applications...