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» A Novel Superscalar Architecture for Fast DCT Implementation
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ISCAS
2008
IEEE
230views Hardware» more  ISCAS 2008»
14 years 2 months ago
Joint optimization of data hiding and video compression
— From copyright protection to error concealment, video data hiding has found usage in a great number of applications. Recently proposed applications such as privacy data preserv...
Jithendra K. Paruchuri, Sen-Ching S. Cheung
DAMON
2006
Springer
13 years 11 months ago
Architecture-conscious hashing
Hashing is one of the fundamental techniques used to implement query processing operators such as grouping, aggregation and join. This paper studies the interaction between modern...
Marcin Zukowski, Sándor Héman, Peter...
MICRO
2007
IEEE
108views Hardware» more  MICRO 2007»
14 years 2 months ago
FPGA-Accelerated Simulation Technologies (FAST): Fast, Full-System, Cycle-Accurate Simulators
This paper describes FAST, a novel simulation methodology that can produce simulators that (i) are orders of magnitude faster than comparable simulators, (ii) are cycleaccurate, (...
Derek Chiou, Dam Sunwoo, Joonsoo Kim, Nikhil A. Pa...
ISSS
1997
IEEE
103views Hardware» more  ISSS 1997»
13 years 12 months ago
Fast and Extensive System-Level Memory Exploration for ATM Applications
In this paper, our memory architecture exploration methodology and CAD techniques for network protocol applications are presented. Prototype tools have been implemented, and appli...
Peter Slock, Sven Wuytack, Francky Catthoor, Gjalt...
ICCD
2000
IEEE
93views Hardware» more  ICCD 2000»
14 years 4 months ago
Cheap Out-of-Order Execution Using Delayed Issue
In superscalar architectures, out-of-order issue mechanisms increase performance by dynamically rescheduling instructions that cannot be statically reordered by the compiler. Whil...
J. P. Grossman