471 search results - page 59 / 95 » A Parallel Hardware Architecture for Image Feature Detection |
CGO
2004
IEEE
14 years 13 days ago
2004
IEEE
In this paper, we describe a generalized approach to deriving a custom data layout in multiple memory banks for array-based computations, to facilitate high-bandwidth parallel mem...
IPPS
1999
IEEE
14 years 29 days ago
1999
IEEE
The rapid progress in high-performance microprocessor design has made it di cult to adapt real-time scheduling results to new models of microprocessor hardware, thus leaving an un...
EH
1999
IEEE
14 years 1 months ago
1999
IEEE
MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reco...
HPCA
2006
IEEE
14 years 9 months ago
2006
IEEE
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi...
IPPS
2007
IEEE
14 years 3 months ago
2007
IEEE
Automatic library generators, such as ATLAS [11], Spiral [8] and FFTW [2], are promising technologies to generate efficient code for different computer architectures. The library...