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» A Parallel Hardware Architecture for Image Feature Detection
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ISSS
2002
IEEE
138views Hardware» more  ISSS 2002»
14 years 1 months ago
An Object-Oriented Design Process for System-on-Chip Using UML
The object-oriented design process has been a hot topic in software development since it will improve product quality and productivity significantly, which is also a major issue i...
Tsuneo Nakata, Akio Matsuda, Minoru Shoji, Shinya ...
ISCAPDCS
2001
13 years 10 months ago
Branch Prediction of Conditional Nested Loops through an Address Queue
-Multi-dimensional applications, such as image processing and seismic analysis, usually require the optimized performance obtained from instruction-level parallelism. The critical ...
Zhigang Jin, Nelson L. Passos, Virgil Andronache
GLVLSI
2007
IEEE
154views VLSI» more  GLVLSI 2007»
14 years 3 months ago
A design kit for a fully working shared memory multiprocessor on FPGA
This paper presents a framework to design a shared memory multiprocessor on a programmable platform. We propose a complete flow, composed by a programming model and a template ar...
Antonino Tumeo, Matteo Monchiero, Gianluca Palermo...
IJCSA
2008
117views more  IJCSA 2008»
13 years 8 months ago
Altivec Vector Unit Customization for Embedded Systems
Vector extensions for general purpose processors are an efficient feature to address the growing performance demand of multimedia and computer vision applications. Embedded proces...
Tarik Saidani, Joel Falcou, Lionel Lacassagne, Sam...
3DIM
2007
IEEE
14 years 8 months ago
Automatic Pose Estimation for Range Images on the GPU
Object pose (location and orientation) estimation is a common task in many computer vision applications. Although many methods exist, most algorithms need manual initialization ...
Marcel Germann, Michael D. Breitenstein, In Kyu Pa...