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FPL
2006
Springer
105views Hardware» more  FPL 2006»
14 years 10 days ago
A Scalable Network ASIP Enabling Flow Awareness in Ethernet Access
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
K. Van Renterghem, Dieter Verhulst, S. Verschuere,...
PG
2002
IEEE
14 years 1 months ago
Lworld: An Animation System Based on Rewriting
Lworld is a computer graphics animation system based on L-systems, a parallel rewriting technique used primarily in computer graphics for plant modeling. Because rulebased program...
Hansrudi Noser
ASPDAC
2004
ACM
120views Hardware» more  ASPDAC 2004»
14 years 2 months ago
Compiler based exploration of DSP energy savings by SIMD operations
— The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the ...
Markus Lorenz, Peter Marwedel, Thorsten Dräge...
ICPP
2008
IEEE
14 years 3 months ago
Optimizing JPEG2000 Still Image Encoding on the Cell Broadband Engine
JPEG2000 is the latest still image coding standard from the JPEG committee, which adopts new algorithms such as Embedded Block Coding with Optimized Truncation (EBCOT) and Discret...
Seunghwa Kang, David A. Bader
ICCD
2008
IEEE
136views Hardware» more  ICCD 2008»
14 years 5 months ago
A resource efficient content inspection system for next generation Smart NICs
— The aggregate power consumption of the Internet is increasing at an alarming rate, due in part to the rapid increase in the number of connected edge devices such as desktop PCs...
Karthik Sabhanatarajan, Ann Gordon-Ross