471 search results - page 69 / 95 » A Parallel Hardware Architecture for Image Feature Detection |
125
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FPL
2006
Springer
15 years 7 months ago
2006
Springer
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
102
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PG
2002
IEEE
15 years 8 months ago
2002
IEEE
Lworld is a computer graphics animation system based on L-systems, a parallel rewriting technique used primarily in computer graphics for plant modeling. Because rulebased program...
151
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ASPDAC
2004
ACM
15 years 8 months ago
2004
ACM
— The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the ...
133
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ICPP
2008
IEEE
15 years 9 months ago
2008
IEEE
JPEG2000 is the latest still image coding standard from the JPEG committee, which adopts new algorithms such as Embedded Block Coding with Optimized Truncation (EBCOT) and Discret...
141
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ICCD
2008
IEEE
16 years 9 days ago
2008
IEEE
— The aggregate power consumption of the Internet is increasing at an alarming rate, due in part to the rapid increase in the number of connected edge devices such as desktop PCs...