168 search results - page 8 / 34 » A Parameterized Architecture Model in High Level Synthesis f... |
DAC
1999
ACM
13 years 12 months ago
1999
ACM
This paper presents a novel approach for synthesis of analog systems from behavioral VHDL-AMS specifications. We implemented this approach in the VASE behavioral-synthesis tool. ...
SAMOS
2004
Springer
14 years 29 days ago
2004
Springer
In recent years, power consumption has become a critical concern for many VLSI systems. Whereas several case studies demonstrate that technology-, layout-, and gate-level technique...
VLSID
2003
IEEE
14 years 8 months ago
2003
IEEE
Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardwa...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
Abstract— This paper addresses high level synthesis for realtime digital signal processing (DSP) architectures using heterogeneous functional units (FUs). For such special purpos...
SIGGRAPH
1999
ACM
13 years 12 months ago
1999
ACM
We introduce a new concept for accelerating realistic image synthesis algorithms. At the core of this procedure is a novel physical error metric that correctly predicts the percep...