204 search results - page 34 / 41 » A Pipelined Memory Architecture for High Throughput Network ... |
SIGADA
2001
Springer
13 years 12 months ago
2001
Springer
The last years have seen an increasing, albeit restricted simulation of large-scale networks on shared memory parallel platforms. As the complexity of communication protocols and ...
HPCA
2003
IEEE
14 years 7 months ago
2003
IEEE
Originally developed to connect processors and memories in multicomputers, prior research and design of interconnection networks have focused largely on performance. As these netw...
FPL
2006
Springer
13 years 11 months ago
2006
Springer
This paper presents an implementation of a high-performance network application layer parser in FPGAs. At the core of the architecture resides a pattern matcher and a parser. The ...
TVLSI
2008
13 years 7 months ago
2008
Applications in computer networks often require high throughput access to large data structures for lookup and classification. While advanced algorithms exist to speed these search...
ISCA
2011
IEEE
12 years 11 months ago
2011
IEEE
Emerging memory technologies such as STT-RAM, PCRAM, and resistive RAM are being explored as potential replacements to existing on-chip caches or main memories for future multi-co...