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» A Power Reduction Scheme for Data Buses by Dynamic Detection...
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127
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DSD
2003
IEEE
84views Hardware» more  DSD 2003»
15 years 9 months ago
A Power Reduction Scheme for Data Buses by Dynamic Detection of Active Bits
Masanori Muroyama, Akihiko Hyodo, Takanori Okuma, ...
DAC
2005
ACM
15 years 5 months ago
Sign bit reduction encoding for low power applications
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...
M. Saneei, Ali Afzali-Kusha, Zainalabedin Navabi
121
Voted
ICCD
2005
IEEE
109views Hardware» more  ICCD 2005»
16 years 25 days ago
VALVE: Variable Length Value Encoder for Off-Chip Data Buses.
We propose VAriable Length Value Encoding (VALVE) technique to reduce the power consumption in the off-chip data buses. While past research has focused on encoding fixed length da...
Dinesh C. Suresh, Banit Agrawal, Walid A. Najjar, ...
120
Voted
HIPC
2003
Springer
15 years 9 months ago
FV-MSB: A Scheme for Reducing Transition Activity on Data Buses
Power consumption becomes an important issue for modern processors. The off-chip buses consume considerable amount of total power [9,7]. One effective way to reduce power is to red...
Dinesh C. Suresh, Jun Yang 0002, Chuanjun Zhang, B...
CASES
2003
ACM
15 years 9 months ago
Power efficient encoding techniques for off-chip data buses
Reducing the power consumption of computing devices has gained a lot of attention recently. Many research works have focused on reducing power consumption in the off-chip buses as...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa...