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PDPTA
2000
13 years 10 months ago
Evaluation of Neural and Genetic Algorithms for Synthesizing Parallel Storage Schemes
Exploiting compile time knowledge to improve memory bandwidth can produce noticeable improvements at run-time [13, 1]. Allocating the data structure [13] to separate memories when...
Mayez A. Al-Mouhamed, Husam Abu-Haimed
FMCAD
2007
Springer
14 years 27 days ago
Improved Design Debugging Using Maximum Satisfiability
In today's SoC design cycles, debugging is one of the most time consuming manual tasks. CAD solutions strive to reduce the inefficiency of debugging by identifying error sourc...
Sean Safarpour, Hratch Mangassarian, Andreas G. Ve...
CRYPTO
2012
Springer
234views Cryptology» more  CRYPTO 2012»
11 years 11 months ago
Homomorphic Evaluation of the AES Circuit
We describe a working implementation of leveled homomorphic encryption (without bootstrapping) that can evaluate the AES-128 circuit in three different ways. One variant takes und...
Craig Gentry, Shai Halevi, Nigel P. Smart
ECAI
2008
Springer
13 years 10 months ago
Optimizing Causal Link Based Web Service Composition
Automation of Web service composition is one of the most interesting challenges facing the Semantic Web today. Since Web services have been enhanced with formal semantic descriptio...
Freddy Lécué, Alexandre Delteil, Ala...
ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
14 years 17 days ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah