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TPDS
2002
142views more  TPDS 2002»
13 years 7 months ago
MediaWorm: A QoS Capable Router Architecture for Clusters
With the increasing use of clusters in real-time applications, it has become essential to design high performance networks with Quality-of-ServiceQoS guarantees. In this paper, we...
Ki Hwan Yum, Eun Jung Kim, Chita R. Das, Aniruddha...
ASPLOS
2006
ACM
14 years 1 months ago
Tartan: evaluating spatial computation for whole program execution
Spatial Computing (SC) has been shown to be an energy-efficient model for implementing program kernels. In this paper we explore the feasibility of using SC for more than small k...
Mahim Mishra, Timothy J. Callahan, Tiberiu Chelcea...
SBCCI
2005
ACM
276views VLSI» more  SBCCI 2005»
14 years 1 months ago
Virtual channels in networks on chip: implementation and evaluation on hermes NoC
Networks on chip (NoCs) draw on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. Congesti...
Aline Mello, Leonel Tedesco, Ney Calazans, Fernand...
MICRO
2008
IEEE
139views Hardware» more  MICRO 2008»
14 years 1 months ago
Adaptive data compression for high-performance low-power on-chip networks
With the recent design shift towards increasing the number of processing elements in a chip, high-bandwidth support in on-chip interconnect is essential for low-latency communicat...
Yuho Jin, Ki Hwan Yum, Eun Jung Kim
ICCD
2004
IEEE
107views Hardware» more  ICCD 2004»
14 years 4 months ago
Network-on-Chip: The Intelligence is in The Wire
In this paper we describe how Network-on-Chip (NoC) will be the next major challenge to implementing complex and function-rich applications in advanced manufacturing processes at ...
Gérard Mas, Philippe Martin