74 search results - page 8 / 15 » A RISC Hardware Platform for Low Power Java |
ICES
2010
Springer
13 years 5 months ago
2010
Springer
Recently, a reconfigurable and biologically inspired paradigm based on network-on-chip (NoC) and spiking neural networks (SNNs) has been proposed as a new method of realising an ef...
ISSS
2000
IEEE
14 years 7 days ago
2000
IEEE
Various system-level core-based power evaluation approaches for core types like microprocessors, caches, main memories, and buses, have been proposed in the past. Approaches for o...
OOPSLA
2010
Springer
13 years 6 months ago
2010
Springer
Heterogeneous multi-core processors, such as the IBM Cell processor, can deliver high performance. However, these processors are notoriously difficult to program: different cores...
CLOUD
2010
ACM
14 years 28 days ago
2010
ACM
Virtualization is often used in cloud computing platforms for its several advantages in efficiently managing resources. However, virtualization raises certain additional challeng...
ITC
2003
IEEE
14 years 1 months ago
2003
IEEE
This work discusses the impact of power consumption on the test time of core-based systems, when an available on-chip network is reused as test access mechanism. A previously prop...