515 search results - page 80 / 103 » A Reduced Complexity Algorithm for Minimizing N-Detect Tests |
ICIP
2003
IEEE
14 years 9 months ago
2003
IEEE
We present an improved, prescient, scheme to deliver pre-encoded video streams at very low latency. We dynamically manage the prediction dependency for a group of packets using a ...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
In the field of chip design, hardware module reuse is a standard solution to the increasing complexity of chip architecture and the pressures to reduce time to market. In the abs...
ISVC
2009
Springer
14 years 1 months ago
2009
Springer
Smooth trivariate splines on uniform tetrahedral partitions are well suited for high-quality visualization of isosurfaces from scalar volumetric data. We propose a novel rendering ...
ARITH
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper introduces two novel architectures for parallel decimal multipliers. Our multipliers are based on a new algorithm for decimal carry–save multioperand addition that us...
QEST
2007
IEEE
14 years 1 months ago
2007
IEEE
Among the many stages of a simulation study, debugging a simulation model is the one that is hardly reported on but that may consume a considerable amount of time and effort. In t...