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» A Review of Simulation Optimization Techniques
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CAD
2006
Springer
15 years 4 months ago
An efficient, error-bounded approximation algorithm for simulating quasi-statics of complex linkages
Design and analysis of articulated mechanical structures, commonly referred to as linkages, is an integral part of any CAD/CAM system. The most common approaches formulate the pro...
Stephane Redon, Ming C. Lin
ISPASS
2009
IEEE
15 years 11 months ago
GARNET: A detailed on-chip network model inside a full-system simulator
Until very recently, microprocessor designs were computation-centric. On-chip communication was frequently ignored. This was because of fast, single-cycle on-chip communication. T...
Niket Agarwal, Tushar Krishna, Li-Shiuan Peh, Nira...
ACSAC
2004
IEEE
15 years 8 months ago
Using Predators to Combat Worms and Viruses: A Simulation-Based Study
Large-scale attacks generated by fast-spreading or stealthy malicious mobile code, such as flash worms and e-mail viruses, demand new approaches to patch management and disinfecti...
Ajay K. Gupta 0002, Daniel C. DuVarney
DATE
2000
IEEE
142views Hardware» more  DATE 2000»
15 years 8 months ago
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Balakrishna Kumthekar, Fabio Somenzi
DATE
2002
IEEE
95views Hardware» more  DATE 2002»
15 years 9 months ago
Optimal Transistor Tapering for High-Speed CMOS Circuits
Transistor tapering is a widely used technique applied to optimize the geometries of CMOS transistors in highperformance circuit design with a view to minimizing the delay of a FE...
Li Ding 0002, Pinaki Mazumder