1234 search results - page 232 / 247 » A Scheduling and Pipelining Algorithm for Hardware Software ... |
158
Voted
CODES
2003
IEEE
15 years 8 months ago
2003
IEEE
One of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integ...
141
Voted
TPDS
2010
14 years 9 months ago
2010
As an efficient distribution mechanism, Peer-to-Peer (P2P) technology has become a tremendously attractive solution to offload servers in large-scale video streaming applications. ...
136
Voted
ISCA
2006
IEEE
15 years 2 months ago
2006
IEEE
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
130
Voted
CODES
2007
IEEE
15 years 9 months ago
2007
IEEE
We address the problem of instruction selection for Multi-Output Instructions (MOIs), producing more than one result. Such inherently parallel hardware instructions are very commo...
107
Voted
FPL
2005
Springer
15 years 8 months ago
2005
Springer
This paper describes a method based on polynomial approximation for transferring ROM resources used in FPGA designs to multiplication and addition operations. The technique can be...