Sciweavers

1234 search results - page 242 / 247
» A Scheduling and Pipelining Algorithm for Hardware Software ...
Sort
View
PLDI
2003
ACM
14 years 24 days ago
A comparison of empirical and model-driven optimization
Empirical program optimizers estimate the values of key optimization parameters by generating different program versions and running them on the actual hardware to determine which...
Kamen Yotov, Xiaoming Li, Gang Ren, Michael Cibuls...
ISCA
2000
IEEE
107views Hardware» more  ISCA 2000»
13 years 12 months ago
A fully associative software-managed cache design
As DRAM access latencies approach a thousand instructionexecution times and on-chip caches grow to multiple megabytes, it is not clear that conventional cache structures continue ...
Erik G. Hallnor, Steven K. Reinhardt
CODES
2005
IEEE
14 years 1 months ago
Improving superword level parallelism support in modern compilers
Multimedia vector instruction sets are becoming ubiquitous in most of the embedded systems used for multimedia, networking and communications. However, current compiler technology...
Christian Tenllado, Luis Piñuel, Manuel Pri...
PLDI
2010
ACM
14 years 5 months ago
Pacer: Proportional Detection of Data Races
Data races indicate serious concurrency bugs such as order, atomicity, and sequential consistency violations. Races are difficult to find and fix, often manifesting only in deploy...
Michael D. Bond, Katherine E. Coons, Kathryn S. Mc...
LCTRTS
2007
Springer
14 years 1 months ago
SWL: a search-while-load demand paging scheme with NAND flash memory
As mobile phones become increasingly multifunctional, the number and size of applications installed in phones are rapidly increasing. Consequently, mobile phones require more hard...
Jihyun In, Ilhoon Shin, Hyojun Kim