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FPGA
2009
ACM
343views FPGA» more  FPGA 2009»
14 years 2 months ago
Fpga-based face detection system using Haar classifiers
This paper presents a hardware architecture for face detection based system on AdaBoost algorithm using Haar features. We describe the hardware design techniques including image s...
Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kas...
DATE
2007
IEEE
141views Hardware» more  DATE 2007»
13 years 11 months ago
Energy-efficient real-time task scheduling with task rejection
In the past decade, energy-efficiency has been an important system design issue in both hardware and software managements. For mobile applications with critical missions, both ene...
Jian-Jia Chen, Tei-Wei Kuo, Chia-Lin Yang, Ku-Jei ...
DATE
2002
IEEE
123views Hardware» more  DATE 2002»
14 years 18 days ago
False Path Elimination in Quasi-Static Scheduling
We have developed a technique to compute a Quasi Static Schedule of a concurrent specification for the software partition of an embedded system. Previous work did not take into a...
G. Arrigoni, L. Duchini, Claudio Passerone, Lucian...
ASPDAC
2001
ACM
81views Hardware» more  ASPDAC 2001»
13 years 11 months ago
High-level specification and efficient implementation of pipelined circuits
This paper describes a novel approach to high-level synthesis of complex pipelined circuits, including pipelined circuits with feedback. This approach combines a high-level, modula...
Maria-Cristina V. Marinescu, Martin C. Rinard
JCP
2008
126views more  JCP 2008»
13 years 7 months ago
Hardware/Software Co-design Approach for an ADALINE Based Adaptive Control System
Abstract--In this paper, we report some results on hardware and software co-design of an adaptive linear neuron (ADALINE) based control system. A discrete-time Proportional-Integra...
Shouling He, Xuping Xu