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» A Scheduling and Pipelining Algorithm for Hardware Software ...
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DATE
2007
IEEE
78views Hardware» more  DATE 2007»
14 years 1 months ago
Hardware scheduling support in SMP architectures
In this paper we propose a hardware real time operating system (HW-RTOS) that implements the OS layer in a dual-processor SMP architecture. Intertask communication is specified b...
André C. Nácul, Francesco Regazzoni,...
DAC
1994
ACM
13 years 11 months ago
Software Scheduling in the Co-Synthesis of Reactive Real-Time Systems
Existing software scheduling techniques limit the functions that can be implemented in software to those with a restricted class of timing constraints, in particular those with a c...
Pai H. Chou, Gaetano Borriello
DAC
1994
ACM
13 years 11 months ago
Loop Pipelining for Scheduling Multi-Dimensional Systems via Rotation
Multi-dimensional(MD) systems are widely used in scienti c applications such as image processing, geophysical signal processing and uid dynamics. Earlier scheduling methods in syn...
Nelson L. Passos, Edwin Hsing-Mean Sha, Steven C. ...
ASPDAC
2006
ACM
103views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Low area pipelined circuits by multi-clock cycle paths and clock scheduling
— A new algorithm is proposed to reduce the number of intermediate registers of a pipelined circuit using a combination of multi-clock cycle paths and clock scheduling. The algor...
Bakhtiar Affendi Rosdi, Atsushi Takahashi
VEE
2012
ACM
187views Virtualization» more  VEE 2012»
12 years 3 months ago
DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support
Dynamic Binary Translators (DBT) and Dynamic Binary Optimization (DBO) by software are used widely for several reasons including performance, design simplification and virtualiza...
Demos Pavlou, Enric Gibert, Fernando Latorre, Anto...