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DATE
2003
IEEE
104views Hardware» more  DATE 2003»
14 years 1 months ago
Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip
We present an innovative protocol processor component that combines wire-speed processing for low-level, and best effort processing for higher-level protocols. The component is a ...
George Lykakis, N. Mouratidis, Kyriakos Vlachos, N...
EMSOFT
2005
Springer
14 years 1 months ago
A structural approach to quasi-static schedulability analysis of communicating concurrent programs
We describe a system as a set of communicating concurrent programs. Quasi-static scheduling compiles the concurrent programs into a sequential one. It uses a Petri net as an inter...
Cong Liu, Alex Kondratyev, Yosinori Watanabe, Albe...
EMSOFT
2007
Springer
14 years 2 months ago
Scheduling multiple independent hard-real-time jobs on a heterogeneous multiprocessor
This paper proposes a scheduling strategy and an automatic scheduling flow that enable the simultaneous execution of multiple hard-real-time dataflow jobs. Each job has its own ...
Orlando Moreira, Frederico Valente, Marco Bekooij
CASES
2008
ACM
13 years 10 months ago
SoC-C: efficient programming abstractions for heterogeneous multicore systems on chip
fficient Programming Abstractions for Heterogeneous Multicore Systems on Chip Alastair D. Reid Krisztian Flautner Edmund Grimley-Evans ARM Ltd Yuan Lin University of Michigan The ...
Alastair D. Reid, Krisztián Flautner, Edmun...
SIGMETRICS
2009
ACM
103views Hardware» more  SIGMETRICS 2009»
14 years 2 months ago
Restrained utilization of idleness for transparent scheduling of background tasks
A common practice in system design is to treat features intended to enhance performance and reliability as low priority tasks by scheduling them during idle periods, with the goal...
Ningfang Mi, Alma Riska, Xin Li, Evgenia Smirni, E...