210 search results - page 17 / 42 » A Self-Reconfigurable Gate Array Architecture |
ICCAD
1995
IEEE
13 years 11 months ago
1995
IEEE
In a typical design
ow, the design may be altered slightly several times after the initial design cycle according to minor changes in the design speci cation either as a result o...
FCCM
2008
IEEE
14 years 2 months ago
2008
IEEE
Internet Protocol (IP) lookup in routers can be implemented by some form of tree traversal. Pipelining can dramatically improve the search throughput. However, it results in unbal...
ISVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
As CMOS technology continues to scale, copper interconnect (CuI) will hinder the performance and reliability of Field Programmable Gate Arrays (FPGA) motivating the need for alter...
WSC
1998
13 years 9 months ago
1998
Causality constraints of random discrete simulation make parallel and distributed processing difficult. Methods of applying reconfigurable logic to implement and accelerate simula...
TVLSI
2008
13 years 7 months ago
2008
Abstract--In this paper, we describe the design for a co-processor for whole-genome phylogenetic reconstruction. Our current design performs a parallelized breakpoint median comput...