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» A Self-Reconfigurable Gate Array Architecture
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DAC
1996
ACM
13 years 11 months ago
Characterization and Parameterized Random Generation of Digital Circuits
The development of new Field-Programmed, MaskProgrammed and Laser-Programmed Gate Array architectures is hampered by the lack of realistic test circuits that exercise both the arc...
Michael D. Hutton, Jerry P. Grossman, Jonathan Ros...
CVPR
1998
IEEE
14 years 9 months ago
Real-Time 2-D Feature Detection on a Reconfigurable Computer
We have designed and implemented a system for real-time detection of 2-D features on a reconfigurable computer based on Field Programmable Gate Arrays (FPGA `s). We envision this ...
Arrigo Benedetti, Pietro Perona
DATE
2007
IEEE
114views Hardware» more  DATE 2007»
14 years 2 months ago
Two-level microprocessor-accelerator partitioning
The integration of microprocessors and field-programmable gate array (FPGA) fabric on a single chip increases both the utility and necessity of tools that automatically move softw...
Scott Sirowy, Yonghui Wu, Stefano Lonardi, Frank V...
FPGA
1995
ACM
142views FPGA» more  FPGA 1995»
13 years 11 months ago
The Design of RPM: An FPGA-based Multiprocessor Emulator
Recent advances in Field-Programmable Gate Arrays (FPGA) and programmable interconnects have made it possible to build efficient hardware emulation engines. In addition, improveme...
Koray Öner, Luiz André Barroso, Sasan ...
ICASSP
2011
IEEE
12 years 11 months ago
Hardware acceleration of iterative image reconstruction for X-ray computed tomography
X-ray computed tomography (CT) images could be improved using iterative image reconstruction if the 3D conebeam forward- and back-projection computations can be accelerated signif...
Jung Kuk Kim, Zhengya Zhang, Jeffrey A. Fessler