210 search results - page 6 / 42 » A Self-Reconfigurable Gate Array Architecture |
ICRA
1994
IEEE
13 years 11 months ago
1994
IEEE
We describe a cost-effective method for developing parallel architectures which increase the performance of range and image sensors. A parametrised edge detector and its systolic ...
DAC
1999
ACM
14 years 8 months ago
1999
ACM
A number of researchers have proposed using digital marks to provide ownership identification for intellectual property. Many of these techniques share three specific weaknesses: ...
GLVLSI
2003
IEEE
14 years 27 days ago
2003
IEEE
Power-awareness indicates the scalability of the system energy with changing conditions and quality requirements. Multipliers are essential elements used in DSP applications and c...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper presents an infrastructure to test the functionality of the specific architectures output by a highlevel compiler targeting dynamically reconfigurable hardware. It resu...
ERSA
2006
13 years 9 months ago
2006
Optically Reconfigurable Gate Arrays (ORGAs), by exploiting the large storage capacity of holographic memory, offer the possibility of providing a virtual gate count that is much l...