Sciweavers

29 search results - page 4 / 6
» A Self-Reconfigurable Implementation of the JPEG Encoder
Sort
View
ASAP
2007
IEEE
111views Hardware» more  ASAP 2007»
14 years 1 months ago
Entropy Coding on a Programmable Processor Array for Multimedia SoC
Entropy encoding and decoding is a crucial part of any multimedia system that can be highly demanding in terms of computing power. Hardware implementation of typical compression a...
Roberto R. Osorio, Javier D. Bruguera
ICIP
2000
IEEE
13 years 11 months ago
EBWIC: A low Complexity and Efficient Rate Constrained Wavelet Image Coder
Efficient compression algorithms generally use wavelet transforms. They try to exploit all the signal dependencies that can appear inside and across the different sub-bands of th...
Christophe Parisot, Marc Antonini, Michel Barlaud
IPPS
2005
IEEE
14 years 29 days ago
A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable Platforms
In this paper, we describe a prototype software framework that implements a formalized methodology for partitioning computational intensive applications between reconfigurable har...
Michalis D. Galanis, Athanasios Milidonis, George ...
CODES
2005
IEEE
14 years 1 months ago
Novel architecture for loop acceleration: a case study
In this paper, we show a novel approach to accelerate loops by tightly coupling a coprocessor to an ASIP. Latency hiding is used to exploit the parallelism available in this archi...
Seng Lin Shee, Sri Parameswaran, Newton Cheung
TCAD
2008
183views more  TCAD 2008»
13 years 7 months ago
Systematic and Automated Multiprocessor System Design, Programming, and Implementation
Abstract--For modern embedded systems in the realm of highthroughput multimedia, imaging, and signal processing, the complexity of embedded applications has reached a point where t...
Hristo Nikolov, Todor Stefanov, Ed F. Deprettere