144 search results - page 5 / 29 » A Self-Test Approach Using Accumulators as Test Pattern Gene... |
ET
2000
13 years 7 months ago
2000
The paper presents a novel hierarchical approach to test pattern generation for sequential circuits based on an input model of mixed-level decision diagrams. A method that handles,...
IWANN
1995
Springer
13 years 11 months ago
1995
Springer
This paper presents a comparative analysis of neural networks, simulated annealing, and genetic algorithms in the determination of input patterns for testing analog circuits. The ...
GLVLSI
2003
IEEE
14 years 22 days ago
2003
IEEE
In this paper a novel reseeding architecture for scan-based BIST, which uses an LFSR as TPG, is proposed. Multiple cells of the LFSR are utilized as sources for feeding the scan c...
ITC
1991
IEEE
13 years 11 months ago
1991
IEEE
Two approaches have been used to balance the cost of generating e ective tests for ICs and the need to increase the ICs' quality level. The rst approach favorsusing high-leve...
DAC
1997
ACM
13 years 11 months ago
1997
ACM
This paper presents a novel approach for automatic test pattern generation of asynchronous circuits. The techniques used for this purpose assume that the circuit can only be exerc...