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» A Spatial Logic for Concurrency
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ICCD
2007
IEEE
120views Hardware» more  ICCD 2007»
14 years 5 months ago
Statistical timing analysis using Kernel smoothing
We have developed a new statistical timing analysis approach that does not impose any assumptions on the nature of manufacturing variability and takes into account an arbitrary mo...
Jennifer L. Wong, Azadeh Davoodi, Vishal Khandelwa...
ICCAD
2004
IEEE
125views Hardware» more  ICCAD 2004»
14 years 5 months ago
Temporal floorplanning using the T-tree formulation
Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we model each task ...
Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang
ICDAR
2009
IEEE
14 years 3 months ago
User-Guided Wrapping of PDF Documents Using Graph Matching Techniques
There are a number of established products on the market for wrapping—semi-automatic navigation and extraction of data—from web pages. These solutions make use of the inherent...
Tamir Hassan
ASPDAC
2009
ACM
212views Hardware» more  ASPDAC 2009»
14 years 3 months ago
Timing analysis and optimization implications of bimodal CD distribution in double patterning lithography
Abstract— Double patterning lithography (DPL) is in current production for memory products, and is widely viewed as inevitable for logic products at the 32nm node. DPL decomposes...
Kwangok Jeong, Andrew B. Kahng
ICRA
2007
IEEE
157views Robotics» more  ICRA 2007»
14 years 2 months ago
Distributed Watchpoints: Debugging Large Multi-Robot Systems
Abstract— Tightly-coupled multi-agent systems such as modular robots frequently exhibit properties of interest that span multiple modules. These properties cannot easily be detec...
Michael DeRosa, Jason Campbell, Padmanabhan Pillai...